2011 Yan Choe Ellenbogen Lieber Harvard MITRE Programmable Nanowire Circuits for Nanoprocessors
<p>Jan 16, 2013 01:24 PM
 
496 FET nodes in an area 960 micron2
 
full adder; subtractor, multiplexer.
 
built from BOTTOM UP tiled architecture
 
built from nanowire transistor array...   single-nanowire, non-vol FETs
 
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