2021 eetimes Cerebras Second-Gen
<p>April 25, 2021, 2:29 PM</p>
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<p>recomm by Rich Seidner;</p>
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<p>pub in eetimes April 20 2021..</p>
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<p>TSMC 7 nm node;</p>
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<p>WSE2; entire wafer! 2.6 Tr transistors;</p>
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<p>“Our strategy began with the assumption we would face flaws [in the crystalline structure of the silicon],” he said. “When there’s a flaw,<strong> we don’t throw away the wafer. We map around it just like the data center guys do, when there’s a flaw in one of their servers, they shut it down and they map around it… </strong>this technique is only possible if you have extreme numbers of identical units, because otherwise the cost of carrying redundant elements is very, very high. And so our yields, even at 7 nm are much, much higher than much smaller parts like the GPU.”</p>
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<p>Over and above the 850,000 processor cores, there are<strong> also 1% redundant cores purely for this eventuality.</strong> Connections between nearest neighbors allow defective cores to be skipped with “almost no penalty,” Feldman said. He conceded that patterns of defects that would take out multiple adjacent cores would be harder to overcome, but added that these are “extraordinarily rare. Defects at a beautifully-run fab like TSMC are stochastically distributed, they are randomly distributed, and so our yield is extraordinarily high.”</p>