ITRS Home
<p class="default">Feb 4, 2008 8:11 PM
 
This whole thing is totally cool ... it keeps getting better - clearer .
The Exec Summary nicely defines terms and the document and the Winter presentations are def. cool.
 
page 11:  it is anticipated that heterogeneous integration at the chip level or the package level will integrate
(one or more new devices) and new capabilities around a CMOS core.
 
page 13:  THE RED BRICK WALL ...  no known solution to manufac. exists.  ... a research challenge
 
Half pitch defines the NODE  but they will dump that standard now in 2008 and on ... just label with a year.
DRAM is the usual half pitch standard.  see pic on page 15.
 
see page 18  Roadmap Scope:    In many cases  NON-CMOS soutions are employed.
They will be integrated either on chip or in package.
 
page 20:  450mm wafers was initl targeted for 2012 but is being pushed back to 2012 to 2016  becuz of cost
A 300mm fab costs $4B ....!!!!
 
page 23  multiple e-beam maskless litho ... may be the moste conom. and sought after solution (if write rate can be increased)
 
 
 
 
 
 
 
10:24 PM, June 17, 2007 this is from the <b>2006</b> update
 
<i>The International Technology Roadmap for Semiconductors (ITRS)</i> is the result of a worldwide consensus-building
process. This document predicts the main trends in the semiconductor industry spanning across 15 years into the future.
The participation of experts from Europe, Japan, Korea, and Taiwan as well as the U.S.A. ensures that the ITRS is a valid
source of guidance for the semiconductor industry as we strive to extend the historical advancement of semiconductor
technology and the worldwide integrated circuit (IC) market. These five regions jointly sponsor the ITRS.
 
See Table 1a Chip size model</p>